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Method and apparatus for controlling congestion during integrated circuit design resynthesisпатент
- Авторы: Galatenko A.V., Gasanov E.E., Lyalin I.V.
- Номер: US 7,401,313
- Дата публикации патента: 15 июля 2008 г.
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Реферат (описание изобретения):
The present disclosure is directed to a method and apparatus for dividing an integrated circuit design field into a plurality of congestion rectangles having user-selectable sizes. A routing congestion value is estimated for each congestion rectangle prior to routing interconnections within the design field. The congestion values are stored in machine-readable memory and are updated in response to wire changes within the design field.
- Добавил в систему: Гасанов Эльяр Эльдарович