ИСТИНА

The key limitation for increasing the integration scale of traditional RSFQ logic is the size of geometric inductors. This work proposes a novel approach to the miniaturization of superconducting circuits, combining two key strategies: 1) a transition to inductor-free (all-JJ) logic, where Josephson junctions completely replace bulky geometric inductors [1], and 2) the introduction of a minimal number of elements with controllable kinetic inductance into key circuit nodes to enable functional reconfigurability.We demonstrate the design of programmable splitters and tunable logic blocks, such as AND/OR and XOR/OR gates, where the same physical circuit can be dynamically switched between different logical functions. This programmability minimizes the total number of active components in complex circuits. Building upon these reconfigurable gates, we propose a novel architecture for a universal programmable logic cell. This architecture serves as an analogue of the Look-Up Table (LUT) used in FPGA designs. However, instead of storing pre-computed truth tables in memory, our approach implements a programmable logic basis, where the functionality is defined by the operational modes of the tunable logic gates, enabling true hardware-level dynamic reconfiguration. Our circuit designs leverage inductor-free, junction-based approach within a reconfigurable architecture, demonstrating a path toward more compact and versatile superconductor computing systems. Furthermore, this methodology is exceptionally promising for neuromorphic systems, where the ability to dynamically alter the function of a cell significantly enhances the efficient implementation of plastic synaptic connections and adaptive network architectures, paving the way for next-generation, high-density, and energy-efficient superconducting processors.